ASIC Engineer Intern, Design Verification

Urgent
Application ends: April 23, 2026
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Job Description

Company: Meta
Location: Bangalore, Karnataka, India
Job Type: Internship (12-16 weeks)
Experience: Currently pursuing Bachelor’s/Master’s/PhD
Education: Electrical/Computer Engineering or related fields
Expected Salary: ₹33–50K per month
Job Category: ASIC Design Verification, Hardware Intern, Information Technology, Engineering
Website: Website
Contact: Conatct us


About the Company:
🌐 Meta builds global infrastructure powering Facebook, Instagram, WhatsApp serving billions daily worldwide.
Bangalore ASIC team develops “Green” data center accelerators enabling efficient hyperscale operations.


About the Role:
🔍 12-16 week internship verifying advanced ASIC IPs for Meta’s data center acceleration workloads.
Hands-on experience with real silicon projects using state-of-the-art tools alongside senior engineers.


Key Responsibilities:

  • 📊 Develop tests/checkers/coverage; understand architecture/microarchitecture; write SystemVerilog/UVM/C testbenches.
  • 🔧 Automate verification processes with Python/Perl scripts; debug failures; collaborate with design teams.
  • 📈 Improve verification methodology; contribute to cutting-edge data center accelerator development.

Requirements:

Core Skills:

  • 🛠️ Pursuing EE/CE degree; Computer Architecture/Logic Design fundamentals; critical problem-solving mindset.
  • 🔒 Work authorization; intent to return to degree program post-internship; team collaboration essential.

Desired:

  • 📊 Masters/PhD pursuing; SystemVerilog/VHDL/Verilog knowledge; Python/Perl scripting experience.

Why Join Meta ASIC Internship?
✅ ₹33–50K/month premium stipend + world-class Bangalore labs working on live data center silicon projects.
✅ Rare VLSI exposure verifying Meta’s AR/VR/AI accelerators powering global social infrastructure.
✅ 12-16 weeks hands-on chip design verification with direct senior engineer mentorship and global impact.